The demand for manufacturing electrical assemblies with greater densities and smaller package size requires techniques to efficiently utilize the available area on a printed circuit board. One such technique is to directly bond the integrated circuit chip to the corresponding contact points on the printed circuit board, thereby eliminating the necessity of using a chip carrier with a conventional ceramic or plastic cover or encapsulating the integrated circuit chip. The most popular method of directly bonding a chip to a circuit board is known as chip-on-board (COB). In chip-on-board, the integrated circuit (IC) is mounted directly on the circuit board and is either wirebonded to the board or attached using TAB technology. These techniques have been widely used in the manufacture of watches and other small electronic products. However, the IC is brittle and fragile and is subject to stress and breakage if the circuit board is bent, vibrated, or exposed to wide variations in the operating environment. Accordingly, in many applications, such as two-way radios and other portable communication devices where the assembly is subject to vibration and severe environmental disturbances, direct connections between the IC and the circuit board are not desirable.
Conventional techniques for protecting and packaging the IC provide a buffer substrate between the IC and the circuit board, thereby reducing or eliminating the stress imparted to the chip during mechanical and thermal excursions. Conventional ceramic and plastic leadless chip carriers fall into this category. The buffer substrate also enables one to utilize simpler, lower cost circuit boards without the need for high density lines and spaces.
In COB technology, the IC is attached to the substrate by means of control-collapse-chip-connection (also known as C4). In order to achieve high yields and reliability in making a C4 connection, a cleanroom environment must be utilized. One can easily see that the C4 process is not suitable for normal manufacturing facilities where components are mounted on the circuit boards.
In addition, as the number of input and output connections (I/O) on the IC increases, the size of a buffer substrate required to interconnect the IC to the circuit board also increases. In those applications where it is necessary to minimize the height of the chip carrier package, very thin buffer substrates are used. The creates another problem; namely, the buffer substrate can now be easily warped, bent, or bowed, creating numerous problems when attempting to assemble the chip carrier package to the circuit board. Conventional attempts to rigidize the substrate involve using more expensive :substrates and/or using thicker substrates, neither of which is a desired solution. Thicker substrates defeat the purpose of creating a small, thin chip carder package and exotic laminates also thwart any attempts at creating low-cost packages.
Clearly, a need exists for an integrated circuit package that can solve the problems of mechanical and thermal excursions, reduced size, lower cost packages, provide chip carders that can be electrically tested prior to assembly to the main board, and that do not require a cleanroom environment for assembly of the package to the main circuit board.